MA300013【PDF 42/92 页】MODULE DSPIC30F SAMPLE 80QFP

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dsPIC30F

TABLE 10-8:

COMPARE/SKIP INSTRUCTIONS

Assembly Syntax

Description

Words

Cycles

BTSC

BTSC

BTSS

BTSS

CP

CP

CP

CP0

CP0

CPB

CPB

CPB

CPSEQ

CPSGT

CPSLT

CPSNE

f,#bit4

Ws,#bit4

f,#bit4

Ws,#bit4

f

Wb,#lit5

Wb,Ws

f

Ws

f

Wb,#lit5

Wb,Ws

Wb,Wn

Wb,Wn

Wb,Wn

Wb,Wn

Bit test f, skip if clear

Bit test Ws, skip if clear

Bit test f, skip if set

Bit test Ws, skip if set

Compare (f – WREG)

Compare (Wb – lit5)

Compare (Wb – Ws)

Compare (f – 0x0000)

Compare (Ws – 0x0000)

Compare with Borrow (f – WREG – C)

Compare with Borrow (Wb – lit5 – C)

Compare with Borrow (Wb – Ws – C)

Compare Wb with Wn, Skip if Equal (Wb = Wn)

Signed Compare Wb with Wn, Skip if Greater Than (Wb > Wn)

Signed Compare Wb with Wn, Skip if Less Than (Wb < Wn)

Signed Compare Wb with Wn, Skip if Not Equal (Wb ≠ Wn )

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1 (2 or 3)

1 (2 or 3)

1 (2 or 3)

1 (2 or 3)

1

1

1

1

1

1

1

1

1 (2 or 3)

1 (2 or 3)

1 (2 or 3)

1 (2 or 3)

Note 1:

2:

Bit positions are specified by bit4 (0:15) for word operations.

Conditional skip instructions execute in 1 cycle if the skip is not taken, 2 cycles if the skip is taken over a

one-word instruction and 3 cycles if the skip is taken over a two-word instruction.

DS70043F-page 40

? 2005 Microchip Technology Inc.

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